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Microchip Technology /ATSAME70Q20 /AFEC0 /DIFFR

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Interpret as DIFFR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DIFF0)DIFF0 0 (DIFF1)DIFF1 0 (DIFF2)DIFF2 0 (DIFF3)DIFF3 0 (DIFF4)DIFF4 0 (DIFF5)DIFF5 0 (DIFF6)DIFF6 0 (DIFF7)DIFF7 0 (DIFF8)DIFF8 0 (DIFF9)DIFF9 0 (DIFF10)DIFF10 0 (DIFF11)DIFF11

Description

AFEC Channel Differential Register

Fields

DIFF0

Differential inputs for channel 0
DIFF1

Differential inputs for channel 1
DIFF2

Differential inputs for channel 2
DIFF3

Differential inputs for channel 3
DIFF4

Differential inputs for channel 4
DIFF5

Differential inputs for channel 5
DIFF6

Differential inputs for channel 6
DIFF7

Differential inputs for channel 7
DIFF8

Differential inputs for channel 8
DIFF9

Differential inputs for channel 9
DIFF10

Differential inputs for channel 10
DIFF11

Differential inputs for channel 11

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data